PUBLICATIONS
Our curated collection of scientific and scholarly publications.
Journal Publications
[1] A. Esmailiyan, E. Blokhina, D. Andrade-Miceli, E. Faust, P. Giounanlis, D. Leipold, H.Wang, I. Bashir, E. Koskin, T. Siriburanon, and R. B. Staszewski, “An On-Chip Picoampere-Level Leakage Current Sensor for Quantum Processors in 22-nm FD-SOI CMOS”, IEEE Trans. on Circuits and Systems I (TCAS-I), vol. 99, pp. 1–5, 26 Dec. 2023. DOI: 10.1109/TCSII.2022.3231568. [IEEE Xplore link (Open Access)] (pre-published)
[2] C. Power, D. Andrade-Miceli, I. Bashir, M. Asker, D. Leipold, R. B. Staszewski, and E. Blokhina, “Modelling of Electron Injection and Confinement in Cryogenic 22-nm FD-SOI Quantum Dot Arrays,” Proc. of 29th IEEE International Conf. on Electronics Circuits and Systems (ICECS), 26 Oct. 2022, pp. 1–4, Glasgow, UK. DOI: 10.1109/ICECS202256217.2022.9971046. [IEEE Xplore link]
[3] X. Wu, P. Giounanlis, E. Blokhina, and R. B. Staszewski, “Control of Quantum Systems: Comparison of Different Techniques by the Example of Charge and Spin Semiconductor Qubits,” Proc. of 29th IEEE International Conf. on Electronics Circuits and Systems (ICECS), 26 Oct. 2022, pp. 1–4, Glasgow, UK. DOI: 10.1109/ICECS202256217.2022.9970925. [IEEE Xplore link]
[4] D. Andrade-Miceli, C. Power, A. Esmailiyan, T. Siriburanon, I. Bashir, M. Asker, D. Leipold, R. B. Staszewski, and E. Blokhina, “Characterisation and Modelling of 22-nm FD-SOI Transistors Operating at Cryogenic Temperatures,” Proc. of 29th IEEE International Conf. on Electronics Circuits and Systems (ICECS), 26 Oct. 2022, pp. 1–4, Glasgow, UK. DOI: 10.1109/ICECS202256217.2022.9970969. [IEEE Xplore link]
[5] C. Power, R. B. Staszewski, and E. Blokhina, “Cryogenic Transistor Confinement Well Simulation Through Material and Carrier Transport Decoupling,” Proc. of 29th IEEE International Conf. on Electronics Circuits and Systems (ICECS), 25 Oct. 2022, poster 35, pp. 1–2, Glasgow, UK. DOI: 10.1109/ICECS202256217.2022.9970779. [IEEE Xplore link]
[6] R. B. Staszewski, A. Esmailiyan, H. Wang, E. Koskin, P. Giounanlis, X. Wu, A. Koziol, A. Sokolov, I. Bashir, M. Asker, D. Leipold, R. Nikandish, T. Siriburanon, and E. Blokhina, “Cryogenic Controller for Electrostatically Controlled Quantum Dots in 22-nm Quantum SoC”, IEEE Open Journal of Solid-State Circuits Society (OJ-SSCS), vol. 2, pp. 103–121, 10 Oct. 2022. DOI:10.1109/OJSSCS.2022.3213528. [IEEE Xplore link (Open Access)]
[7] N. Petropolous, R. B. Staszewski, D. Leipold, and E. Blokhina, “Topological order detection and qubit encoding in Su-Schrieffer-Heeger type quantum dot arrays ,” Journal of Applied Physics, 131, 074401 (2022), vol. 131, pp. 1–15, 18 Feb 2022. DOI: 10.1063/5.0082214. [AIP link (Open Access)]
[8] R. Nikandish, E. Blokhina, D. Leipold and R. B. Staszewski, “Semiconductor Quantum Computing: Toward a CMOS quantum computer on chip,” in IEEE Nanotechnology Magazine, vol. 15, no. 6, pp. 8-20, Dec. 2021, DOI: 10.1109/MNANO.2021.3113216. [IEEE Xplore link]
[9] I. Bashir, D. Leipold, M. Asker, A. Esmailiyan, E. Blokhina, D. Redmond, P. Giounanlis, D. Andrade-Miceli, and R. B. Staszewski, “Bias generation and calibration of CMOS charge qubits at 3.5 kelvin in 22-nm FDSOI,” Proc. of IEEE European Solid-State Circuits Conf. (ESSCIRC), sec. A5L-6, pp. 47–50, 14 Sept. 2021, Grenoble, France (remote). DOI: 10.1109/ESSCIRC53450.2021.9567784. [IEEE Xplore link]
[10] E. Blokhina, A. Sokolov, P. Giounanlis, X. Wu, I. Bashir, D. Leipold, R. B. Staszewski, A. Brambilla, and F. Bizzarri, “Towards the co-simulation of charge qubits: a methodology grounding on an equivalent circuit representation,” IEEE Open Journal of Circuits and Systems (OJCAS), vol. 2, pp. 548-563, 13 Sept. 2021. DOI: 10.1109/OJCAS.2021.3105005. [IEEE Xplore link (Open Access)]
[11] R. B. Staszewski, I. Bashir, E. Blokhina, and D. Leipold, “Cryo-CMOS for quantum system on-chip integration: Quantum computing as the development driver,” IEEE Solid-State Circuits (SSC) Magazine, vol. 13, no. 2, pp. 46–53, Spring 2021. DOI: 10.1109/MSSC.2021.3072807. [IEEE Xplore link]
[12] P. Giounanlis, X. Wu, A. Sokolov, N. Petropoulos, E. Koskin, I. Bashir, D. Leipold, R. B. Staszewski and E. Blokhina, “CMOS charge qubits and qudits: entanglement entropy and mutual information as an optimization method to construct CNOT and SWAP gates”, IOP Semiconductor Science and Technology, 11th Feb 2021. DOI: 10.1088/1361-6641/abe550. [IOP (Open Access)]
[13] A. Esmailiyan, H. Wang, M. Asker, E. Koskin, D. Leipold, I. Bashir, K. Xu, A. Koziol, E. Blokhina and R. B. Staszewski, “A Fully Integrated DAC for CMOS Position-Based Charge Qubits with Single-Electron Detector Loopback Testing”, IEEE Solid-State Circuits Letters (SSC-L), vol. 3, pp. 1–4, 24 Aug. 2020. DOI:10.1109/LSSC.2020.3018707. [IEEE Xplore link (Open Access)]
[14] I. Bashir, E. Blokhina, A. Esmailiyan, D. Leipold, M. Asker, E. Koskin, P. Giounanlis, H. Wang, D. Andrade-Miceli, A. Sokolov, A. Koziol, T. Siriburanon and R. B. Staszewski, “A Single-Electron Injection Device for CMOS Charge Qubits Implemented in 22 nm FD-SOI”, IEEE Solid-State Circuits Letters (SSC-L), vol. 3, pp. 206–209, 21 Jul. 2020. DOI: 10.1109/LSSC.2020.3010822. [IEEE Xplore link (Open Access)]
[15] K. Pomorski, P. Peczkowski, and R. B. Staszewski, “Analytical solutions for N interacting electron system confined in graph of coupled electrostatic semiconductor and superconducting quantum dots in tight-binding model”, Elsevier Cryogenics, vol. 109, pp. 1–27, 23 Jun. 2020. DOI: 10.1016/j.cryogenics.2020.103117. [Elsevier link (open access)] [DOI link (open access)]
[16] E. Blokhina, P. Giounanlis, A. Mitchell, D. Leipold and R. B. Staszewski, “CMOS position-based charge qubits: theoretical analysis of control and entanglement,” IEEE Access, vol. 8, pp. 4182–4197, Dec. 2019. DOI: 10.1109/ACCESS.2019.2960684. [IEEE Xplore link (Open Access)]
[17] P. Giounanlis, E. Blokhina, D. Leipold and R. B. Staszewski, “Photon enhanced interaction and entanglement in semiconductor position-based qubits” , MDPI Applied Sciences, Special Issue in Optics for AI and AI for Optics, 9(21), 4534, pp. 1–15, 25 Oct. 2019. DOI: 10.3390/app9214534. [MDPI Special Issue link] [MDPI link (Open Access)]
[18] K. Pomorski and R. Staszewski, “Description of interface between semiconductor electrostatic qubit and Josephson junction in tight binding model,” Acta Physica Polonica A, proceedings of the 19th National Conference on Superconductivity, Bronislawow, Poland, 6–11 Oct. 2019, no. 5, vol. 138, pp. 728–736, Nov. 2020. DOI: 10.12693/APhysPolA.138.728. [Journal link] [Article link (open access)]
[19] K. Pomorski, P. Giounanlis, E. Blokhina, D. Leipold, and R. B. Staszewski, “Analytic view on coupled single-electron lines”, IOP Science – Semiconductor Science and Technology, vol. 34, no. 12, pp. 1–21, 20 Nov. 2019. (125015) DOI: 10.1088/1361-6641/ab4f40. [IOP link (journal link)] [IOP link (Open Access)]
[20] P. Giounanlis, E. Blokhina, K. Pomorski, D. Leipold and R. B. Staszewski, “Modeling of semiconductor electrostatic qubits realized through coupled quantum dots” , IEEE Access, vol. 7, pp. 49262–49278, April. 2019. DOI: 10.1109/ACCESS.2019.2909489. [IEEE Xplore link (Open Access)]
Conference Publications
[1] D. Andrade-Miceli, A. Esmailiyan, P. Bislaux, E. Blokhina, T. Siriburanon, I. Bashir, M. Asker, D. Leipold, R. B. Staszewski, “Cryogenic low-drop-out regulators fully integrated with quantum dot array in 22-nm FD-SOI CMOS,” 2021 IEEE MTT-S International Microwave Symposium (IMS), pp. 635-637 June. 2021, Atlanta, Georgia USA. DOI: 10.1109/IMS19712.2021.9574910. [IEEE Xplore link]
[2] I. Bashir, D. Leipold, M. Asker, A. Esmailiyan, H. Wang, T. Siriburanon, P. Giounanlis, A. Koziol, E. Blokhina and R. B. Staszewski, “RF clock distribution system for a scalable quantum processor in 22-nm FDSOI operating at 3.8K cryo-genic temperature,” Proc. of IEEE Radio Frequency Integrated Circuits (RFIC) Symp., sec. Mo4A-4, pp. 1–4, 4–6 Aug. 2020, Los Angeles, CA, USA. [Conference link]
[3] R. B. Staszewski, P. Giounanlis, A. Esmailiyan, H. Wang, I. Bashir, C. Cetintepe, D. Andrade-Miceli, M. Asker, D. Leipold, T. Siriburanon, A. Sokolov and E. Blokhina, “Position-based CMOS charge qubits for scalable quantum processors at 4K,” Proc. of IEEE Intl. Symp. on Circuits and Systems (ISCAS), paper 2595, sec. B2L-H, pp. 1–5, 11–14 Oct. 2020, Seville, Spain. DOI: 10.1109/ISCAS45731.2020.9180789. [IEEE Xplore link]
[4] P. Giounanlis, A. Sokolov, E. Blokhina, I. Bashir, D. Leipold and R. B. Staszewski, “Electrostatic control and entanglement of CMOS position-based qubits,” Proc. of IEEE Intl. Symp. on Circuits and Systems (ISCAS), paper 1980, sec. B1L-H, pp. 1–5, 11–14 Oct. 2020, Seville, Spain. DOI: 10.1109/ISCAS45731.2020.9180721. [IEEE Xplore link]
[5] A. Sokolov, D. Mishagli, P. Giounanlis, I. Bashir, D. Leipold, E. Koskin, R. B. Staszewski and E. Blokhina, “Simulation Methodology for Electron Transfer in CMOS Quantum Dots” , International Conference on Computational Science (ICCS), in Proc. of Springer Lecture Notes in Computer Science (LNCS) Series, 10 June 2020, paper 331, pp. 1–14, Amsterdam, The Netherlands. DOI: https://doi.org/10.1007/978-3-030-50433-5 50. [DOI link] [Springer link]
[6] P. Giounanlis, E. Blokhina, I. Bashir, D. Leipold, M. Asker and R. B. Staszewski, “A Python-Verilog toolbox for modeling of a Hadamard gate based on position-based CMOS qubits” , Proc. of 26th IEEE International Conf. on Electronics Circuits and Systems (ICECS), 29 Nov. 2019, ses. C1P-F, pp. 1–4, Genova, Italy. DOI: 10.1109/ICECS46596.2019.8965149. [IEEE Xplore link]
[7] I. Bashir, M. Asker, C. Cetintepe, D. Leipold, A. Esmailiyan, H. Wang, T. Siriburanon, P. Giounanlis, E. Blokhina, K. Pomorski and R. B. Staszewski, “A mixed-signal control core for a fully integrated semiconductor quantum computer system-on-chip” , Proc. of IEEE European Solid-State Circuits Conf. (ESSCIRC), sec. A2L-C4, pp. 125–128, 24 Sept. 2019, Krakow, Poland. DOI:RC.2019.8902885. [IEEE Xplore link]
[8] I. Bashir, P. Giounanlis, E. Blokhina, D. Leipold, K. Pomorski and R. B. Staszewski, “A Verilog-A model of the shuttle of an electron in a two quantum-dot system” , Proc. of 17th IEEE International NEWCAS Conf. (NEWCAS), 25 Jun. 2019, ses. B1P-C3, pp. 1–4, Munich, Germany. DOI: 10.1109/NEWCAS44328.2019.8961307. [IEEE Xplore link]
[9] K. Pomorski, P. Giounanlis, E. Blokhina, D. Leipold, P. Peczkowski and R. B. Staszewski, “From two types of electrostatic position-dependent semiconductor qubits to quantum universal gates and hybrid semiconductor-superconducting quantum computer” , Proceedings of SPIE 11054, Superconductivity and Particle Accelerators (SPAS) 2018 conference, 14 May 2019, pp. 1–21. DOI: https://doi.org/10.1117/12.2525217. [SPIE Digital Library (Open Access)]
[10] P. Giounanlis, E. Blokhina, D. Leipold and R. B. Staszewski, “Occupancy oscillations and electron transfer in multiple-quantum-dot qubits and their circuit representation” , Proc. of 25th IEEE International Conf. on Electronics Circuits and Systems (ICECS), 10 Dec. 2018, ses. A4L-D, pp. 153–156, Bordeaux, France (French). DOI: 10.1109/ICECS.2018.8618063. [IEEE Xplore link (French]
Conference Presentations
[1] I. Bashir, D. Leipold, M. Asker, E. Blokhina, D. Redmond, B. Staszewski, A. Esmailiyan, P. Giounanlis, D. Andrademiceli, A. Sokolov, X. Wu, “A 22nm FD-SOI-CMOS scalable quantum processor SoC with fully integrated control electronics at 3.5K,” American Physical Society (APS) Meeting, 17 Mar. 2021, ses. M30.7, pp. 1–1, USA (remote). [Meeting link]
[2] P. Giounanlis, E. Blokhina, A. Sokolov, E. Koskin, I. Bashir, D. Leipold, M. Asker, A. Esmailian, H. Wang, C. Cetintepe, and R. Staszewski, “Electrostatic control and entanglement of silicon qubits in 22nm FDSOI process,” Quantum Technology International Conference (QTech), pp. 1–1, 2 Nov. 2020, Barcelona, Spain (remote). [Conference link]
[3] K. Pomorski, and R. Staszewski, “Towards quantum internet and non-local communication in position-based qubits,” (V International Conference on Quantum Technologies, 15–19 Jul. 2019, Moscow, Russia), AIP Conference Proceedings, vol. 2241, iss. 1, 020030 (2020), 23 Jun. 2020. DOI: 10.1063/5.0011369. [DOI link] [AIP link] [Conference link]
[4] E. Blokhina, P. Giounanlis, D. Leipold, I. Bashir, M. Asker, A. Esmailiyan, H. Wang, T. Siriburanon, A. Sokolov and R. Staszewski, “Charge and Hybrid Qubits in 22nm FDSOI process” , American Physical Society (APS) Meeting, 6 Mar. 2020, ses. X17.13, pp. 1–1, Denver, Colorado, USA. [Meeting link] [Slides link]
[5] K. Pomorski, P. Giounanlis, E. Blokhina, D. Leipold, and R. Staszewski, “Description of interface between semiconductor and superconducting quantum computer,” XIX National Conference on Superconductivity – Unconventional Superconductivity and Strongly Correlated Electron Systems, 10 Oct. 2019, pp. 1–1, Hotel Magellan, Bronislawow, Poland. [Conference link]
[6] K. Pomorski, P. Giounanlis, E. Blokhina, R. B. Staszewski, “Programmable quantum matter in CMOS electronics,” 7th International Symposium on Integrated Functionalities, 12 Aug. 2019, pp. 1–1, University College Dublin, Dublin, Ireland. [Symposium link]
[7] K. Pomorski, P. Peczkowski, P. Giounanlis, E. Blokhina, R. B. Staszewski and D. Leipold, “Fundamental description of (field induced) Josephson junctions coupling with semiconductor position based electrostatic qubits” , CHATS on Applied Supercon- ductivity, 11 Jul. 2019, pp. 1–1, Faculty of Mechanical Engineering and Mechatronics of the West Pomeranian University of Technology, Szczecin, Poland. [Conference link]
[8] K. Pomorski, P. Giounanlis, E. Blokhina, D. Leipold and R. B. Staszewski, “Unified description of single electron semiconductor devices and Josephson junction devices in the direction of implementation hybrid semiconductor-superconductor quantum computer” , (poster), Superconductivity in low-dimensional and interacting systems, 3 Jun. 2019, pp. 1–1, Physikzentrum, Bad Honnef, Germany. [Conference link]
[9] K. Pomorski, P. Giounanlis, E. Blokhina, D. Leipold and R. B. Staszewski, “Towards universal framework for electrostatic qubit-based semiconductor quantum computer and its integration with CMOS electronics and superconducting quantum circuits” , Engineering a Scalable Quantum Information Processor, 24 Apr. 2019, pp. 1–1, Physikzentrum, Bad Honnef, Germany. [Conference link]
[10] D. Leipold, H. Leipold, L. Leipold, E. Blokhina, P. Giounanlis, K. Pomorski, R. Staszewski, I. Bashir, G. Maxim, M. Asker, C. Cetintepe, A. Esmailiyan, H. Wang and T. Siriburanon, “Implementation and Simulation of Electrostatically Controlled Quantum Dots in CMOS Technology”, American Physical Society (APS) Meeting, 6 Mar. 2019, ses. P35.12, pp. 1–1, Boston, Massachusetts, USA. [Meeting link]
[11] K. Pomorski, P. Giounanlis, E. Blokhina, R. B. Staszewski and D. Leipold, “Modeling quantum universal gates in semiconductor CMOS”, Scalable Hardware Platforms for Quantum Computing, 17 Jan. 2019, pp. 1–1, Physikzentrum, Bad Honnef, Germany. [Conference link]